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[Hardware] Intel has an obsession: very low consumption and powerful processors


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Microprocesador Futuro

 

In a conference that Intel has given in China, the president of the Research Center that the company has in that country has talked about the objectives that they have for 2030 and that can be summarized in making HP chips increasingly smaller and that consume every time less. Which translates into a greater number of transistors and greater energy efficiency. How do they intend to achieve it?

Moore's law, which was coined by the founder of Intel and cannot be said to be a law either, but rather an observation, is often misinterpreted since concepts about it are often confused. In any case, it must be made clear that it does not refer to the economy of the chips or their power, but to the density of transistors in a given space that doubles every so often. Although this has been slowing down over time, the reality is that it is still valid today.

1 trillion transistor chips by 2030 from Intel
For those of us who follow the progress of the world of chips, that is, of semiconductors, it is very clear to us today that the future, in order to be able to double the density of transistors from time to time, requires the use of new manufacturing techniques. and design, especially concepts such as splintered chips, and the use of three-dimensional structures, that is, stacking chips one on top of the other and all this to make chips that will be up to 10 times more efficient and that will house up to a trillion inside. of transistors.

Currently, the most complex chip used in PCs is NVIDIA's AD102, which we think is the central GPU of the RTX 4090, which has a density of 7.6% compared to that target, so we are talking about a Quite a long time for Intel to achieve that goal, what's more, they have considered getting there by 2030, although we don't know if they will do so in their Core CPUs or, conversely, in their ARC GPUs. Let's not forget that the so-called disintegrated microprocessors, or chiplets, make it possible to break the lattice limit of the wafer and create compositions with a greater number of transistors than in a monolithic chip.

In any case, we must bear in mind that once the single-piece chips are shipped, the panorama will have completely changed, since it will mean the obvious use of smaller chips, which is also pursued due to the increase in costs that each new chip manufacturing node.

An order of magnitude improvement in energy efficiency
If we are already talking about energy efficiency, what we have to take into account is that these words, despite being a laudable objective for things like reducing the carbon footprint. We cannot forget that we do not know the power with which they want to measure this parameter and the type of hardware, as well as the performance tests that they plan to use as a reference or failing that today, parameters such as the house of instructions per second, floating point power, etc.

 

https://hardzone.es/noticias/procesadores/intel-eficiencia-energetica-transistores-2030/

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