[Software] The challenges of EUV technology and why RAM will include it

[WilkerCSBD]

Although we have talked at length about EUV technology, there are many things that still remain in the pipeline. Starting with the fact that your application is going to be transferred en masse to other industries outside of GPU and CPU chips, such as RAM, but if the use of EUV is so complicated, why are they going? to introduce in DRAM when they handle very low costs?

The main question of this would be, why does the industry need EUV technology? Everyone is migrating towards it, but the ordinary user does not really understand what the advantages are. In short: costs, speed and scalability. Of the three, perhaps scalability is the most important, because costs and speed are not proportional and one will go down and the other will increase, but if we have a bottleneck in scalability, then the industry does not advance.

Time is intrinsically linked to speed, everyone wants to arrive earlier
EUV cover

The main advantage from the point of view of a mechanical engineer and designer of lithography masks is that EUV simply reduces the steps and the number of patterns used in each engraving.

That in itself is a key advantage, but if we also add a smaller wavelength in nanometers, we will have smaller transistors and curiously better engraved for obtaining the laser and the scanner more precision.

For this reason, TSMC, Samsung and Intel are fighting to get the ASML scanners, especially the Korean one, since it intends (and apparently manages) to include the technology in its NAND Flash for obvious reasons.

But since EUV is still a technology that is far from mature and is extremely expensive, how do you marry the fact that EUV is used when everything is so expensive around it? This is why all manufacturers will end up switching to this technique ...

The nature of NAND Flash allows EUV to be applied to your silicon
EUV photomask

There are three determining factors to understand why the industry will end up in EUVs like CPUs and GPUs. The first has to do with the structure of the cells, since very regular patterns are used to create them, which implies constant repetition of the same.

The second factor is the volume involved in bringing NAND Flash to market. As it is only a design, investing in it pays off if you don't stop producing wafers later, and even updating the skins pays off, since you improve performance and that always comes in handy.

Finally, the redundancy in the design allows a higher failure rate, so you make the wafers and chips much more profitable, improving the final price and being able to be competitive. If we add to this the fact that higher speeds could be achieved in these chips and higher density ... we can understand why despite the huge amount of money that a scanner supposes, Samsung has thrown itself headlong into them. There are three determining factors to understand why the industry will end up in EUVs like CPUs and GPUs. The first has to do with the structure of the cells, since very regular patterns are used to create them, which implies constant repetition of the same.

The second factor is the volume involved in bringing NAND Flash to market. As it is only a design, investing in it pays off if you don't stop producing wafers later, and even updating the skins pays off, since you improve performance and that always comes in handy.

Finally, the redundancy in the design allows a higher failure rate, so you make the wafers and chips much more profitable, improving the final price and being able to be competitive. If we add to this the fact that higher speeds could be achieved in these chips and higher density ... we can understand why despite the huge amount of money that a scanner supposes, Samsung has thrown itself headfirst into them.

Are not masks an issue for DRAM as well as for CPU and GPU?

They are, for everyone alike, the so-called Space-Blanks of EUV masks are still a problem due to their own construction and materials. A mask consists of an area that is bright and another that is dark, where the boundaries between the two are very sharp.

The bright area is a reflector, a very thin layer 40 to 50 nanometers in size below the surface. What this layer is about is to create reflection so that the wafer is blank at that point, so when reflecting the light you need an absorber that acquires that light and does not leave it moving through the mirrors and that is the main problem.