[HARDWARE]Is EDRAM the future of the new iGPUs from Intel and AMD?

[MRO.YeDrA]

It seems a thing of the past, perhaps it is, who knows, but in any case and after Intel's evident commitment to 3D stacking, once again the so-called EDRAM has been brought to the fore. Although it has been a long time without being seen by the different technologies of the iGPUs, it could be the case that it is a direct competitor of HBM in various packages adapted to the new processors. What is EDRAM and how could Intel and AMD implement it?
 

The problem with EDRAM is that it is a concrete concept, but at the same time quite broad. For this reason, its use throughout history has been so different, promoting different chips in a totally new way.
 

Therefore, it is worth explaining what exactly it is and how it can help 3D packaging from both Intel and AMD.
EDRAM: a rather particular and versatile type of memory

 

EDRAM is the acronym for Enhanced Dynamic Random Access Memory, which translated would be Enhanced Dynamic Random Access Memory. It has the peculiarity of being very attractive depending on which chips, since it is not only capable of housing a type of memory as such, but also encompasses a much broader concept of RAM.
 

This means that we can understand EDRAM from SRAM memory to some types of cache. However, they all meet the same pattern: being memory added to the PCB and external to the CPU and iGPU to which both can have access.

Therefore, depending on the type of use of the chip in question, the manufacturer may choose different types of memory and accesses. Logically, it has the problem of access times, since it is not part of the same die itself, but when buffer types are required or expanding the size of caches is a very useful option with minimal loss if the sizes and registers of it are wide.An intermediate step between system RAM
 

EDRAM is by definition a type of memory that acts as an intermediary to the main memory of the system. With nanometer reduction this type of memory has fallen into disuse, but 3D STACKING and the number of chips it can hold as HBMs may bring it back just like that, a buffer where both parties have access.
 

For this, both Intel and AMD would have to be in serious trouble with their ICs and their IMC, since an intermediate actuation controller is required to regulate the accesses.

This is something we have seen on consoles such as PS2, WII U, XBOX ONE or even Intel with HASWELL, so its use can be very valuable in different situations, thereby increasing performance or limiting limitations for various architectural reasons.
 

To finish, EDRAM is a fairly expensive memory to manufacture due to the bandwidths that it has to support with minimum latency, and where a refresh rate is also needed as the common cells of the system RAM.
 

Therefore, the design of it and its ICs are key to simplify processes outside it, making it an independent part and accessible from different parts of the system.

Edited May 10, 2020 by MRO.YeDrA